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MAX107
Dual, 6-Bit, 400Msps ADC with On-Chip,
Wideband Input Amplifier
4
_______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(AVCC = AVCCI = AVCCQ = AVCCR = +5V, OVCCI = OVCCQ = +3.3V, AGND = AGNDI = AGNDQ = AGNDR = 0, OGNDI = OGNDQ
= 0, fCLK = 401.408MHz, CL = 1F to AGND at REF, RL = 100
±1% applied to digital LVDS outputs, TA = TMIN to TMAX, unless
otherwise noted. Typical values are at TA = +25
°C)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Differential
35
36.7
fIN = 124.999MHz at
-0.5dB FS (Note 9)
Single-ended
36.7
Signal-to-Noise Plus Distortion
Ratio
SINAD
fIN = 200.067MHz at
-0.5dB FS
Differential
36
dB
Two-Tone Intermodulation
TTIMD
fIN1 = 100.009MHz, fIN2 = 102.067MHz at
-7dBFS
-55
dBc
Crosstalk Between ADCs
XTLK
fINI = 200.0180MHz, fINQ = 210.0140MHz
at -0.5dB FS
-70
dB
Gain Match Between ADCs
GM
(Note 12)
-0.3
±0.04
+0.3
dB
Phase Match Between ADCs
PM
(Note 12)
-2
±0.2
+2
deg
Metastable Error Rate
Less than 1 in 10
16
Clock
Cycles
POWER REQUIREMENTS
Analog Supply Voltage
AVCC_
AVCC = AVCCI = AVCCQ = AVCCR5
±5%
V
Digital Supply Voltage
OVCC_
OVCC I = OVCC Q
3.3
±10%
V
Analog Supply Current
ICC
ICC = AICC R + AICC I + AICC Q + AICC
250
320
mA
Output Supply Current
OICC
OICC = OICC I + OICC Q
400
510
mA
Analog Power Dissipation
PDISS
2.6
W
Common-Mode Rejection Ratio
CMRR
VIN_+ = VIN_- =
±0.1V (Note 6)
40
60
dB
Power-Supply Rejection Ratio
PSRR
AVCC = AVCC I = AVCC Q = AVCC R =
+4.75V to +5.25V (Note 7)
40
57
dB
TIMING CHARACTERISTICS
Maximum Sample Rate
fMAX
400
Msps
Clock Pulse Width Low
tPWL
1.25
ns
Clock Pulse Width High
tPWH
1.25
ns
Aperture Delay
tAD
100
ps
Aperture Jitter
tAJ
1.5
psRMS
CLK-to-DREADY Propagation
Delay
tPD1
(Note 13)
1.5
ns
DREADY-to-DATA
Propagation Delay
tPD2
(Notes 5, 13)
0
120
300
ps
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